From Silicon to System: Enabling Scalable 3D IC Packaging Through Multiphysics Simulation

Abstract

As the industry moves beyond traditional silicon scaling, 3D IC packaging and heterogeneous integration are becoming key technologies for improving system performance, power efficiency, and functionality. Chiplets, high-bandwidth memory, advanced interconnects, and 3D stacking are creating new design challenges that span electrical, thermal, mechanical, and reliability domains. 

This presentation provides an overview of current 3D IC packaging technologies and shows how multiphysics simulation is helping drive design decisions from early planning through final sign-off. It highlights the role of thermal-aware floorplanning, power and signal integrity analysis, and thermo-mechanical reliability assessment in developing successful 2.5D and 3D systems. The presentation also discusses the value of digital twins and connected workflows in reducing design iterations and improving collaboration across engineering teams. 

Attendees will learn how simulation-driven design is enabling engineers to evaluate trade-offs earlier, make better decisions, and bring increasingly complex heterogeneous systems to market with greater confidence. 

Biography

Andras Vass-Varnai holds MSc and PhD degrees in Electrical Engineering from the Budapest University of Technology and Economics. With nearly two decades of experience at Siemens EDA (formerly Mentor Graphics), spanning product management, R&D leadership, and business development roles in South Korea and the United States, he is currently a 3D IC solutions product manager based in Chicago. His expertise includes thermal and thermo-mechanical workflows for advanced 2.5D/3D semiconductor packaging, thermal management, thermal transient testing, TIM characterization, and semiconductor reliability.